The invention relates to a phase locked loop for controlling a recording device, and more particularly, to a phase locked loop having a phase-shift detector and a phase-controllable frequency divider for controlling an optical recording device.
In a conventional recordable optical disk, such as a DVD-R/RW disk or a DVD+R/RW disk, a wobble signal is used as a reference to generate a write clock for recording data on an optical disk. A phase locked loop (PLL) is commonly applied for generating the required write clock with reference to the wobble signal. Please refer to FIG. 1, which is a diagram of a related art PLL 10. As shown in FIG. 1, the related art PLL 10 generates an output clock in response to a wobble signal extracted from the wobble tracks on a recordable optical disk. The output clock is used as the reference for the recording bit clock. The PLL 10 includes a phase detector (PD) 20, a charge pump 30, a loop filter 40, a voltage-controlled oscillator (VCO) 50, and a frequency divider 60. The PD 20 is used to output a phase error signal to the charge pump 30 by detecting the phase difference between the wobble signal and a divided signal generated from the frequency divider 60. The charge pump 30 is used to generate a voltage based on the phase error signal from the PD 20. After the loop filter 40 receives the voltage outputted from the charge pump 30, the loop filter 40 outputs a control voltage to control the following VCO 50. The VCO 50 receives the control voltage outputted from the loop filter 40, and generates the output clock according to the control voltage. Generally, the frequency of the output clock signal is higher than that of the wobble signal, so that the frequency divider 60 is required for dividing the frequency of the output clock outputted from the VCO 50 to generate the frequency-divided signal delivered to the PD 20.
However, the related art PLL 10 cannot always make the phase of the output clock synchronize with the phase of the wobble signal due to the limitation of the PD 20, which is called the phase shift phenomenon. Please refer to FIG. 2, which illustrates the phase shift phenomenon of the related art. The horizontal axis represents the phase difference θe between the wobble signal and the frequency-divided signal inputted into the PD 20, and the vertical axis stands for the phase error μd outputted from the PD 20. The symbol ΔWd is the detection range of the PD 20. As shown in FIG. 2, it can be easily seen that the phase difference θe is not necessarily equal to zero when the phase error μd equals zero. If the phase difference θe is within the detection range ΔWd of PD 20, such as the point B shown in FIG. 2, the PLL 10 tracks and reduces the phase difference θe to zero (the point A shown in FIG. 2). However, if the phase difference θe is outside the detection range ΔWd of the PD 20, such as the point C shown in FIG. 2, the outputted phase error μd makes the PLL 10 lock the phase to the nearest zero-crossing point (the point D shown in FIG. 2), rather than the desired one (the point A shown in FIG. 2). Therefore, the appearance of the phase shift phenomenon causes the PLL 10 to malfunction.
In the application of recording data on an optical disk, if the phase shift phenomenon occurs, the length of recorded data, which is synchronous to the output clock of the PLL 10, will be longer or shorter than a normal length. Please refer to FIG. 3, which illustrates the recording offset of the related art. FIG. 3(a) shows the case where the length of recorded data is longer than a normal length, and FIG. 3(b) shows another case where the length of recorded data is shorter than the normal length. Suppose that the normal length of each data block is L. As shown in FIG. 3, the length W1 of the data block DATA1 is longer than the normal length L. Therefore, a recording offset D1 is introduced to the recording process, and affects the recording position of the following data blocks DATA2 and DATA3. Similarly, as shown in FIG. 3, the length W2 of the data block DATA4 is shorter than the normal length L, and a recording offset D2 is generated. Therefore, the recording position of the following data blocks DATA5 and DATA6 are affected accordingly. The length variation of recorded data causes the position of recorded data to be shifted from the normal position specified by the recording specification. As mentioned above, each recording offset due to the phase shift phenomenon is accumulated, which is a serious problem of the recording.